1. Field of the Invention
The present invention relates to a semiconductor device, and in particular, to a semiconductor device formed in a semiconductor layer provided on an insulating film.
2. Description of the Related Art
To reduce the power consumption and increase the density of semiconductor integrated circuits, it has been desired to reduce the size and operating voltage of individual elements constituting a semiconductor integrated circuit. In connection with such demands, SOI (Silicon On Insulator) elements are known which operate at a higher speed and with reduced power consumption.
FIGS. 10, 11A, and 11B schematically show a typical SOI element. As shown in FIGS. 10, 11A, and 11B, a semiconductor layer 53 mainly composed of silicon is provided on a semiconductor substrate 51 via an insulating film 52. An MIS (Metal Insulator Semiconductor) transistor Q is formed in an element area of the semiconductor layer 53 that is surrounded by an element separating insulating film 54.
An area (a body area) under a gate electrode G in the semiconductor layer 53 is connected to a contact 55.
The contact 55 is formed in a part of a contact area (contact area) extending over the gate electrode. Impurities of the same conductive type as that of the body area are introduced in the contact area. The potential of the body area is controlled by providing a potential to the contact 55.
The SOI element formed by aforementioned manner, however, needs an additional gate electrode area to form the body contact. Therefore an increase in a capacity existing in the area results in the decrease in the operation speed of the element.
To solve such a problem, the structure (a first conventional example) shown in FIG. 1 of Jpn. Pat. Appln. No. 6-105784 has hitherto been used. That is, this semiconductor device has element separating insulating films 4A and 4B with different thicknesses. An area 5B of a semiconductor layer 2 that is located under the thinner semiconductor separating insulating film 4A is connected to a contact used to control the potential of the body area.
The structure (a second conventional example) shown in Jpn. Pat. Appln. No. 10-242470 is also used. That is, this semiconductor device is connected to a contact 12 in a longitudinal direction of a gate electrode 9 using an area of an SOI active layer 3 that is located under an element separating insulating film 7.
In fabricating a semiconductor device according to the first conventional example, a part of the upper part of a polycrystal Sil2 is etched as shown in FIG. 2 of Prior Art Document 1. Then, an element separating insulating film 13 including the partly etched portion and the other portion having a film thickness different from that of the etched portion is formed, for example, by thermal oxidization. However, it is difficult in terms of controllability to remove only this part of the upper part of the semiconductor layer 2 or form the element separating insulating film 13 with different film thicknesses.
Further, in the second conventional example, an element separating insulating area 6 is formed between an element forming area 4 and a body contact area 5. Thus, this example creates problems such as an increase in area occupied by the element and a decrease in degree of freedom in arrangement of the element.
According to a first aspect of the present invention, a semiconductor device is characterized by comprising a semiconductor substrate, an insulating film disposed on the semiconductor substrate, a semiconductor layer disposed on the insulating film, an element separating insulating film disposed in the semiconductor layer to form a separate element area, a first gate insulating film disposed on the semiconductor layer in the element area, a gate electrode disposed on the first gate insulating film, source/drain diffusion layers formed in the semiconductor layer so as to sandwich a channel area under the gate electrode therebetween, and a potential applying section to induce a leak current which controls the potential of the semiconductor layer, the potential applying section comprising a second gate insulating film disposed on the semiconductor layer in the element area and a conductive film disposed on the second gate insulating film and connected to the gate electrode, the potential applying section being configured so that a leak current flowing through the second gate insulating film is larger than a leak current flowing through the first gate insulating film.